module to_2421;

  reg Clk, Reset;

  wire[3:0] cnt_2421;

  wire[3:0] cnt_8421;

  wire[4:0] mid;

  BCD8421 Ha(cnt_8421, Clk, Reset);

이렇게 호출!

module BCD8421(cnt, Clk, Reset);

output cnt;

input Clk, Reset;

wire T[3:0];

always @(posedge Clk)

  begin

    T[0] = ((~Clk)&(cnt[3:1]|(cnt[0]&cnt[3])))|(Clk&cnt[0]);

    T[1] = ((~Clk)&cnt[3:2])|(cnt[1]&Clk);

    T[2] = ((~Clk)&(~cnt[2])&cnt[3])|(Clk&cnt[2]);

    T[3] = (~Clk)|cnt[3];

    if(T[0])

      T_FF aa(cnt[0], T[0], Reset);

    if(T[1])

      T_FF bb(cnt[1], T[1], Reset);

    if(T[2])

      T_FF cc(cnt[2], T[2], Reset);

    if(T[3])

      T_FF dd(cnt[3], T[3], Reset);

  end

always @(posedge Reset)

  cnt = 4'b0;

endmodule 

module T_FF(CC, Clk, Reset);

  output CC;

  input Clk, Reset;

  wire x2;  

  not (x2, CC);

  assign CC=x2;

endmodule